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This chapter documents the backend for the Motorola 6809, 68HC12 and Hitachi 6309.
This module is written in 2020-2024 by Frank Wille and is covered by the vasm copyright without modifications.
This module provides the following additional options:
Generate code for the 6809 CPU (default setting). Also works on the 6309, which is backwards compatible.
Generate code for the 6309 CPU.
Generate code for the 68HC12 CPU.
Translate short-branches to long and optimize long-branches
to short when required/possible.
Also tries to optimize jmp and jsr instructions
into short-branches.
Delete zero offsets in indexed addressing modes, when possible.
Convert all extended addressing modes with local or external
labels to indexed, PC-relative addressing. Also translates
absolute jmp/jsr instructions into PC-relative
lbra/lbsr (or better).
Generate code for the TURBO9 CPU.
This backend accepts 6809/6309 instructions as described in the Motorola 6809 and Hitachi 6309 Programmer’s Reference (Copyright 2009 Darren Atkinson). Optionally supports the 68HC12 instruction set as documented in Motorola’s CPU12 Reference Manual.
The target address type is 16 bit.
Instructions consist of one up to six bytes and require no alignment. There is also no alignment requirement for sections and data.
The backend supports the unary operators < and > to either
select the size of an addressing mode or the LSB/MSB of a 16-bit word.
< enforces direct mode and > enforces extended mode.
< enforces an
8-bit offset, while > enforces a 16-bit offset.
< enforces an 8-bit offset and > enforces a 16-bit offset.
< selects
the LSB of a word and > selects the MSB.
/256, %256 or &256
on a label in immediate addressing modes or data constants,
an appropriate lo/hi-byte relocation will automatically be generated.
In absence of < or > vasm selects the best addressing
mode possible, i.e. the one which requires the least amount of memory
when the symbol value is known, or the one which allows the largest
symbol values, when it is unknown at assembly time.
This backend extends the selected syntax module by the following directives:
setdp <expr>Set the current base address of the direct page. It is used to decide whether an extended addressing mode can be optimized to direct addressing. No effect for 68HC12.
direct <symbol>Tell the assembler to use direct addressing for expressions based on this symbol.
This backend performs the following operand optimizations:
Bcc) are optionally translated into long-branches
(LBcc) when their destination is undefined, in a different
section or out of range. Note that there is no LBSR on the HC12.
LBcc) are optionally optimized into short-branches
(Bcc) when possible.
JMP into BRA and JSR into
BSR when possible (same section, distance representable in 8 bits).
JMP into LBRA and JSR into
LBSR (‘-opt-pc’).
Some known problems of this module at the moment:
MOVx instructions may be
wrong. Needs testing.
This module has the following error messages:
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