[ << ] [ >> ]           [] [] [] [ ? ]

20 80x86 cpu module

This chapter documents the Backend for the 80x86 microprocessor family.


20.1 Legal

This module is written in 2005-2006,2011,2015-2016 by Frank Wille and is covered by the vasm copyright without modifications.


20.2 Additional options for this module

This module provides the following additional options:

-cpudebug=<n>

Enables debugging output.

-m8086

Generate code for the 8086 CPU.

-mi186

Generate code for the 80186 CPU.

-mi286

Generate code for the 80286 CPU.

-mi386

Generate code for the 80386 CPU.

-mi486

Generate code for the 80486 CPU.

-mi586

Generate code for the Pentium.

-mi686

Generate code for the PentiumPro.

-mpentium

Generate code for the Pentium.

-mpentiumpro

Generate code for the PentiumPro.

-mk6

Generate code for the AMD K6.

-mathlon

Generate code for the AMD Athlon.

-msledgehammer

Generate code for the Sledgehammer CPU.

-m64

Generate code for 64-bit architectures (x86_64).


20.3 General

This backend accepts 80x86 instructions as described in the Intel Architecture Software Developer’s Manual.

The target address type is 32 bits. It is 64 bits when the x86_64 architecture was selected (‘-m64’).

Instructions do not need any alignment. Data is aligned to its natural alignment by default.

The backend uses MIT-syntax! This means the left operands are always the source and the right operand is the destination. Register names have to be prefixed by a ’%’.

The operation size is indicated by a ’b’, ’w’, ’l’, etc. suffix directly appended to the mnemonic. The assembler can also determine the operation size from the size of the registers being used.


20.4 Extensions

Predefined register symbols in this backend:

This backend extends the selected syntax module by the following directives:

.code16

Sets the assembler to 16-bit addressing mode.

.code32

Sets the assembler to 32-bit addressing mode, which is the default.

.code64

Sets the assembler to 64-bit addressing mode.


20.5 Optimizations

This backend performs the following optimizations:


20.6 Known Problems

Some known problems of this module at the moment:


20.7 Error Messages

This module has the following error messages:


[ << ] [ >> ]           [] [] [] [ ? ]