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This chapter documents the backend for the 8080/z80/gbz80/64180/RCMx000 microprocessor family.
This module is copyright in 2009 by Dominic Morris.
* Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
This module provides the following additional options:
Turns on 8080 compatibility mode. Any use of z80 (or higher) opcodes will result in an error being generated.
Turns on gbz80 compatibility mode. Any use of non-supported opcodes will result in an error being generated.
Turns on 64180 mode supporting additional 64180 opcodes.
Turns on Rabbit compatibility mode, generating the correct codes for moved opcodes and supporting the additional Rabbit instructions. In this mode, 8 bit access to the 16 bit index registers is not permitted.
Turns on emulation of some instructions which aren’t available on the Rabbit processors.
Swaps the usage of ix and iy registers. This is useful for compiling generic code that uses an index register that is reserved on the target machine.
Switches on z80asm mode. This translates ASMPC to $ and accepts some pseudo opcodes that z80asm supports. Most emulation of z80asm directives is provided by the oldsyntax syntax module.
This backend accepts z80 family instructions in standard
Zilog syntax. Rabbit opcodes are accepted as defined in the
publically available reference material from Rabbit Semiconductor,
with the exception that the
lcall opcodes need
to be supplied with a 24 bit number rather than an 8 bit
xpc and a
16 bit address.
The target address type is 16 bit.
Instructions consist of one up to six bytes and require no alignment. There is also no alignment requirement for sections and data.
This backend provides the following specific extensions:
ioemodifier. For details of which instructions these are valid for please see the documentation from Rabbit.
<is used to select the low-byte and
>for the high-byte. It has to be the first character before an expression.
&256on a label, an appropriate lo/hi-byte relocation will automatically be generated.
This backend supports the emulation of certain z80 instructions on the
Rabbit/gbz80 processor. These instructions are
The link stage should provide routines with the opcode name prefixed with
rcmx_rld) which implements the same functionality.
Example implementations are available within the z88dk CVS tree.
Additionally, for the Rabbit targets the missing call
will be emulated.
Some known problems of this module at the moment:
lljpare not available).
This module has the following error messages:
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